Open Projects for Master's or Bachelor's Students

Send me your CV to chang.gao at if you are interested in an open project or if you want me to create a project for you.

Efficient Spiking Neural Network Architectures with Spatio-Temporal Pruning

Spiking Neural Networks are a promising alternative to traditional deep neural networks since they perform event-driven information processing like the human brain. However, a drawback of SNN is its high inference latency due to the long timesteps required. If the latency is too high, it also impacts energy efficiency negatively. If pruning can be incorporated into them, the energy benefits of SNNs can be largely revealed. The student will get support from Dr. Qinyu Chen from the Institute of Neuroinformatics, University of Zurich and ETH Zurich.

Always-on keyword spotting on ultra-low-power integrated circuits is a hot topic in chip design for artificial intelligence systems. Previous work used spiking neural networks (SNNs), Convolutional Neural Networks (CNNs) and Recurrent Neural Networks (RNNs), but the state-of-the-art accuracy was recently achieved by transformers. However, transformers have a large memory footprint and many arithmetic operations; thus, it is difficult to be employed on tiny embedded systems with scarce resources. In this project, you will work on developing algorithmic methods to compress the model of transformer neural networks to reduce its memory and arithmetic cost.

The readout integrated circuit (ROIC) is used to capture varying sensor outputs. In this project, you will design a high-speed digital ROIC (DROIC) in a mixed-signal design to capture the number of changed states out of 10,000 binary output signals from the analog domain. The design should be fast enough to capture changes in signals within several nanoseconds and maintain relatively low power consumption for practical industrial applications.

This project is a perfect opportunity for students to deepen their understanding of digital circuit design, timing & power analysis and practice their SystemVerilog/Verilog programming skills. Stipends for the master's student taking this project are possible and negotiable. Good results could lead to internship opportunities with our industrial partners.

Cochlear implants (CI) [1, 2] are miniaturized biomedical devices that can help deaf people perceive sound or help hearing loss patients understand speech better. The CI has an in-vitro module attached behind the ear and an in-vivo implant surgically placed under the skin. The quality of CI output signals degrades in noisy environments and relies on Speech enhancement (SE) systems to enhance its performance. Neural network-based SEs [3] achieve state-of-the-art performance but are expensive to deploy on CI with a limited power budget. In this work, you will build a small-footprint NN-based SE system that can run on embedded devices [4, 5, 6] in real-time.